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Cadence announces chiplet partner ecosystem with Samsung and Arm

Wednesday, January 7, 2026 at 08:40 AM

Cadence has launched a new chiplet design ecosystem in collaboration with partners including Samsung and Arm to accelerate the development of multi-die semiconductor solutions.

Context

Cadence Design Systems launched its Chiplet Spec-to-Packaged Parts ecosystem on January 6, 2026, a strategic move to standardize multi-die design for AI and data center hardware. In collaboration with Samsung Foundry and Arm, the ecosystem aims to lower engineering barriers and speed up production for high-performance computing (HPC) and physical AI. This partnership leverages Arm’s new Zena Compute Subsystem (CSS) to enhance the Cadence chiplet framework, specifically targeting the demanding processing requirements of autonomous systems, robotics, and cloud infrastructure. The collaboration involves a silicon prototype demonstration on Samsung's SF5A process, integrating pre-validated IP to ensure interoperability across different vendors. Cadence confirmed that a base system chiplet using UCIe 32G and LPDDR5X technology has already been fully silicon validated. For investors, this represents a major step toward maturing the chiplet supply chain, offering a low-risk path for companies moving away from traditional monolithic semiconductor designs to more flexible, modular AI architectures.

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