SK Hynix is developing All-In-Plug (AIP) technology to transition from triple-stack etching to a single-stack process for next-generation NAND. The goal is to perform High Aspect Ratio Contact (HARC) etching in a single step for 300-plus layer NAND, significantly reducing manufacturing costs and improving throughput compared to the current 321-layer triple-stack method. Tokyo Electron (TEL) is suggested as a potential partner for cryogenic etching equipment to enable this transition.