News
QuickLogic secures contract for eFPGA Hard IP optimized for the Intel 18A process node
Wednesday, March 18, 2026 at 03:39 AM
QuickLogic has secured a contract to provide its high-density eFPGA Hard IP for a customer's ASIC project. The silicon will be manufactured using the Intel 18A process node, demonstrating continued traction for Intel's foundry services.
Context
On March 17, 2026, QuickLogic announced it secured a contract to provide high-density eFPGA Hard IP for a new customer ASIC utilizing Intel 18A technology. This deal, valued in the mid-six-figures, follows a previously signaled delay from late 2025 due to customer funding timing. The contract focuses on implementing architectural enhancements to optimize power, performance, and silicon area (PPA) for the sub-5nm process node.
This development is a significant milestone for QuickLogic as it transitions from the delivery of test chips in April 2025 to full-scale ASIC integration on Intel's most advanced node. By leveraging its Australis IP Generator, the company is positioning itself as a critical provider of programmable logic for U.S. Defense Industrial Base (DIB) and commercial sectors requiring onshore fabrication. Investors should note that this contract supports the company's 2026 revenue recovery strategy following a $4.0 million GAAP net loss reported in Q3 2025.
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