Rumor
Arm architecture reportedly increases supported DDR memory capacity
Saturday, March 28, 2026 at 01:02 AM
The post claims Arm is significantly increasing the DDR memory capacity in its designs.
Context
As of March 28, 2026, Arm Holdings is reportedly enhancing its architecture to support significantly higher DDR memory capacity, a move aimed at addressing the "memory wall" in AI and data center workloads. This development follows the recent launch of the Arm AGI CPU, which features up to 136 Neoverse V3 cores and delivers 6 GB/s per-core memory bandwidth. By increasing supported capacity, Arm enables system architects to pair high core counts with the massive datasets required for continuous inference and agentic AI.
This shift is critical as Arm transitions from an IP provider to a deliverer of production silicon, such as the 300W TDP AGI CPU. Current configurations already support high-density deployments, including air-cooled racks with over 8,160 cores. Increasing the architectural ceiling for DDR5 and future memory standards allows Arm to better compete with x86 incumbents by offering the memory footprint necessary for large language models and multi-tenant cloud environments.
Sources (9)
How to setup the DDR configuration - stm32mpu - ST wikiDDR System Memory Controller • Versal Adaptive SoC Technical Reference Manual (AM011) • Reader • AMD Technical Information PortalDynamic Memory blockMemory Safety: How Arm Memory Tagging Extension Addresses this Industry-wide Security Challenge - Arm Newsroom[PDF] Arm AGI CPUCortex A73's Not-So-Infinite Reordering Capacity - Chips and CheeseARM vs. x86: The Battle of Architectures in 2025 - Unihost.com BlogUnderstanding the differences between ARM and x86 Instances | Scaleway Documentation
Related Companies
Arm Holdings
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