RumorUnverified

Advantest and Teradyne expected to benefit from increased HBM4 wafer and system testing requirements

Sunday, March 29, 2026 at 04:21 AM

Industry reports suggest that the transition to HBM4 will significantly increase the volume of wafer-level and system-level testing. There is also potential for the introduction of die-level testing, which would benefit major automated test equipment providers.

Context

The semiconductor testing market is entering a high-growth phase as Teradyne and Advantest prepare for the transition to HBM4 and next-generation AI accelerators. While Advantest currently serves as the sole provider for NVIDIA Blackwell final testing, Teradyne recently secured a critical HBM4 post-stack singulated die win, signaling an increase in test insertions. Industry analysts expect testing requirements to intensify by late 2026 as memory vendors shift to a 2048-bit interface, requiring complex logic-based base dies and more rigorous wafer-level validation. This architectural shift is a significant tailwind for the automated test equipment (ATE) sector. Teradyne has projected a $800 million revenue target for its AI compute segment by 2028, while Advantest anticipates stronger demand in 2026 driven by longer testing cycles for advanced architectures like Rubin. As the cadence for new AI hardware accelerates to a yearly cycle, the increased complexity of 3DIC stacks ensures that test intensity remains a primary driver of value for the leading equipment suppliers.

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