Rumor

TSMC unlikely to adopt High-NA EUV for A14 and A10 nodes due to ecosystem delays

Sunday, January 18, 2026 at 01:13 PM

Industry experts suggest that TSMC is unlikely to adopt ASML High-NA EUV lithography for its A14 (1.4nm) or A10 (1nm) nodes due to ecosystem unreadiness and timing constraints in the R&D cycle. While Intel has acquired High-NA tools for its 14A node, challenges with Optical Proximity Correction (OPC) and the broader manufacturing ecosystem may hinder high-volume production for both foundries in the near term.

Context

TSMC is reportedly bypassing ASML’s High-NA EUV lithography for its A14 (1.4nm) and A10 (1nm) nodes, citing critical gaps in the broader ecosystem. While Intel has prioritized early adoption of the $380 million tools for its 14A process, experts warn that essential infrastructure like Optical Proximity Correction (OPC) is not yet ready for high-volume manufacturing. Since TSMC locks its process roadmaps years in advance, the current lack of technical readiness means the foundry will likely stick to matured EUV double-patterning to avoid technical bottlenecks and excessive costs through the 2026-2027 cycle. This divergence highlights a strategic split: Intel is betting on hardware leadership to regain market share, while TSMC prioritizes yield stability and cost-efficiency. If ecosystem delays persist, Intel’s heavy capital investment may not deliver a performance lead in time. Consequently, TSMC’s conservative approach likely secures its margin dominance as the industry waits for High-NA technology to mature and become commercially viable for mass production.

Related Companies

TSMC

2330

ASML

Intel

INTC