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Seiko Epson joins national project for 3D hetero-integration in edge AI semiconductors

Wednesday, January 28, 2026 at 10:33 AM

Seiko Epson is participating in a Japanese national project to develop next-generation edge AI semiconductors. In collaboration with Tohoku University and other partners, the company will focus on 3D hetero-integration technology, a critical component for advancing edge AI hardware efficiency and performance.

Context

Seiko Epson Corporation has joined a Japanese national project to develop 3D hetero-integration technology for next-generation edge AI semiconductors. Collaborating with Tohoku University, the company will focus on manufacturing techniques for vertically stacking disparate chip components. This initiative targets the increasing demand for high-performance, low-power processing in edge devices, a sector critical for the future of autonomous systems and industrial IoT. This move signals Seiko Epson’s strategic entry into the advanced AI hardware supply chain. By utilizing its precision micro-fabrication expertise, the company aims to resolve thermal and bandwidth bottlenecks in current chip designs. The project is part of a larger multi-billion yen national effort to lead in semiconductor packaging. Success in this R&D phase positions Seiko Epson as a key contributor to the global AI economy, potentially diversifying its revenue beyond traditional consumer electronics and printing solutions.

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