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ASE Technology highlights FOCoS and FOCoS-Bridge advanced packaging solutions
Sunday, March 8, 2026 at 09:19 PM
ASE Technology is showcasing its advanced packaging technologies, including Fan-Out Chip on Substrate (FOCoS) and FOCoS-Bridge (FOCoS-B), which are critical for high-performance computing and AI chip integration.
Context
In May 2025, ASE Technology expanded its VIPack platform by introducing FOCoS-Bridge with Through Silicon Via (TSV), a strategic development aimed at high-performance computing (HPC) and AI workloads. This technology creates a shorter vertical path for power delivery, significantly reducing resistance by 72% and inductance by 50% compared to previous iterations. By embedding these bridge chips and passive devices, ASE effectively addresses the critical thermal and energy efficiency demands of next-generation HBM3 and ASIC integration.
This innovation is positioned as a cost-effective alternative to traditional 2.5D silicon interposers, as it bypasses reticle size constraints and utilizes organic interposers with fine-pitch redistribution layers. Recent test vehicles demonstrate the ability to interconnect multiple chiplets within large 85mm x 85mm packages, providing the high I/O density required for evolving AI architectures. By optimizing power integrity and signal transmission, ASE strengthens its competitive standing in the advanced packaging supply chain for the rapidly growing chiplet market.
Sources (6)
ASE Announces FOCoS-Bridge with TSV; Latest Package Technology Reduces Power Loss by 3x for Next-Generation AI and HPC Applications | ASE HoldingsFOCoS-Bridge | ASEHPCwire - Since 1987 – Covering the Fastest Computers in the World and the People Who Run ThemASE Announces FOCoS-Bridge With TSV; Latest Package Technology Reduces Power Loss by 3x for Next-Generation AI and HPC Applications - Business WireAdvanced Packaging Design For Heterogeneous Integration[PDF] Advanced packaging - SEMI.org
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