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Nvidia requests 16-layer HBM supply from Samsung, SK Hynix, and Micron for late 2025
Sunday, December 28, 2025 at 06:31 AM
Samsung Electronics, SK Hynix, and Micron have initiated development of 16-layer (16-HI) High Bandwidth Memory (HBM) following a supply request from Nvidia for delivery by Q4 2025. This advanced packaging feat requires stacking more DRAM layers within the 775-micrometer thickness standard set by JEDEC, likely necessitating wafer thickness reduction to approximately 30 micrometers. The companies are exploring advanced bonding techniques, including TC-NCF and MR-MUF, to manage the increased vertical density and thermal challenges of the 16-HI configuration, which may be branded as HBM4 or HBM4E.
Context
Nvidia has requested that Samsung Electronics, SK Hynix, and Micron supply next-generation 16-layer (16-HI) High Bandwidth Memory (HBM) by the fourth quarter of 2025. This move significantly accelerates the AI memory roadmap, pushing for HBM4 or HBM4E variants to meet surging computational demands. Performance evaluations for these unprecedented 16-layer stacks are expected to begin as early as the third quarter of 2025, following the mass production of 12-HI HBM4 earlier that year.
The transition to 16 layers requires reducing wafer thickness from 50 micrometers to roughly 30 micrometers to remain within the 775-micrometer industry height standard. This intensifies the technical rivalry between SK Hynix’s MR-MUF bonding technology and the TC-NCF methods utilized by Samsung and Micron. For investors, this race is pivotal; the supplier that successfully overcomes these thinning and heat dissipation challenges will likely secure market dominance in Nvidia’s next-generation AI infrastructure supply chain.
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