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TSMC and Samsung develop compute-in-memory technology to reduce data transfer power consumption
Friday, January 30, 2026 at 09:29 PM
TSMC and Samsung Electronics are advancing the development of Compute-in-Memory (CiM) technology. This architecture integrates memory and logic to significantly reduce power consumption associated with data transfer between the two, addressing key bottlenecks in next-generation computing.
Context
TSMC and Samsung Electronics are accelerating the development of Compute-in-Memory (CiM) technology to overcome the "memory wall" bottleneck in AI hardware. By integrating processing logic directly into memory chips, these leaders aim to eliminate the massive energy cost of moving data between separate components—a process that currently accounts for up to 80% of total power consumption in high-intensity AI workloads. This shift is essential as global infrastructure moves toward more sustainable, large-scale inference.
Recent benchmarks indicate that CiM can deliver a 10x improvement in energy efficiency for deep learning tasks compared to traditional architectures. Samsung is currently qualifying its HBM4 solutions for mass production starting in February 2026, while TSMC is utilizing its 2nm node and advanced packaging to integrate logic and memory at the die level. With data center power limits becoming a major market constraint, these unified chips are expected to see mass-market adoption as the standard for next-generation generative AI infrastructure.
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