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Imec develops 300mm wafer process for silicon quantum qubits using EUV lithography, following Intel's path to scalable quantum computing.
Wednesday, November 26, 2025 at 08:13 PM
The Belgian R&D hub imec announced a 300mm wafer process to fabricate silicon spin qubits, utilizing EUV lithography to improve gate alignment and scale up production, aligning with Intel's efforts to move quantum technology toward mass manufacturing.
Context
Leading European research hub imec is now fabricating silicon spin qubits using advanced EUV lithography on 300mm wafers, a critical step toward mass-producing quantum processors. This move, reported in November 2025, directly follows the path of Intel, which has been leveraging its existing semiconductor fab infrastructure to scale quantum devices. The adoption of mainstream manufacturing techniques signals a major industry shift, aiming to overcome the production bottlenecks that have confined quantum computing to specialized labs.
This convergence of quantum research and high-volume manufacturing is a significant validation for the silicon qubit approach. By using the same EUV tools as advanced logic chips, the industry can dramatically improve qubit uniformity and yield—the primary hurdles to building fault-tolerant quantum computers. Intel previously set a key benchmark with its 12-qubit "Tunnel Falls" chip, achieving an impressive 95% device yield rate across wafers. imec's progress reinforces this strategy, suggesting the timeline for scalable quantum computing is becoming increasingly tied to the capabilities of the existing semiconductor supply chain.
Sources (16)
Imec in 2024: an overviewEnergy Efficiency Scaling for Two Decades Research and ...imec developing 300mm process for quantum qubits .. ...Intel releases silicon spin quantum chip: using EUV process, 95 ...Taking a quantum leap from lab to fabIntel Pioneers Scalable Quantum Computing with 12 Spin-Qubit ...Intel Chips Away at Fault-Tolerant Quantum Computing With Latest ...EUVで量子ビット、imecがインテルに続く 半導体と融合
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