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Taiwanese firms invest NT$300 billion in advanced packaging and testing capacity
Friday, February 27, 2026 at 11:15 PM
Taiwanese semiconductor firms are investing over NT$300 billion in advanced packaging and testing capacity. TSMC aims to reach a monthly CoWoS output of 100,000 wafers by the end of 2026. Major OSAT players including ASE, Powertech, and KYEC have allocated significant capital expenditures for 2024, while CHPT plans to double its capacity by the first quarter of 2027.
Context
Taiwanese semiconductor leaders and major OSAT providers are committing over NT$300 billion (approx. US$10 billion) to aggressively expand advanced packaging and testing capacity. TSMC is spearheading this infrastructure surge, aiming to scale its monthly CoWoS output to 100,000 wafers by the end of 2026, a significant jump from the 70,000 wafers produced monthly in 2025. This massive capital injection, which excludes TSMC’s individual capex, highlights a coordinated effort across the supply chain to eliminate bottlenecks in AI chip production.
Leading the outsourced expansion, ASE has earmarked a record NT$220 billion for capex, while Powertech and KYEC follow with investments of NT$40 billion and NT$39.37 billion respectively. Specialized firms are also scaling rapidly, with CHPT targeting a 100% capacity increase by Q1 2027 and WinWay investing NT$3.5 billion. For investors, this synchronized build-out signals that advanced packaging has become as vital as front-end fabrication for the AI era. These investments provide long-term visibility into the hardware roadmap through 2027, as firms race to support the next generation of high-performance computing.
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